元器件交易网www.cecb2b.comPhilips Semiconductors Product specificationHex D flip-flop74F174FEATURESPIN CONFIGURATION•Six edge-triggered D-type flip-flops•Buffered common ClockMR116VCC•Q0215Q5Buffered, asynchronous Master ResetD0314D5DESCRIPTIOND1413D4The 74F174 has six edge-triggered D-type flip-flops with individual DQ1512Q4inputs and Q outputs. The common buffered Clock (CP) and MasterD2611D3Reset (MR) inputs load and reset (clear) all flip-flops simultaneously.Q2710Q3The register is fully edge-triggered. The state of each D input, onesetup time before the Low-to-High clock transition is transferred toGNDCPthe corresponding flip-flop’s Q output.SF00188All Q outputs will be forced Low independent of Clock or Data inputsby a Low voltage level on the MR input. The device is useful forapplications where true outputs only are required, and the Clock andMaster Reset are common to all storage elements.ORDERING INFORMATIONTYPICALCOMMERCIAL RANGETYPETYPICAL fSUPPLY CURRENTDESCRIPTIONVCC = 5V ±10%, PKG DWG #MAX(TOTAL)Tamb = 0°C to +70°C74F174100MHz35mA16-pin plastic DIPN74F174NSOT38-416-pin plastic SON74F174DSOT109-1INPUT AND OUTPUT LOADING AND FAN-OUT TABLEPINSDESCRIPTION74F (U.L.) HIGH/LOWLOAD VALUE HIGH/LOWD0–D5Data inputs1.0/1.020µA/0.6mACPClock Pulse input (active rising edge)1.0/1.020µA/0.6mAMRMaster Reset input (active-Low)1.0/1.020µA/0.6mAQ0–Q5Outputs50/331.0mA/20mANOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.LOGIC SYMBOLIEC/IEEE SYMBOL3461113149C11RD0D1D2D3D4D531D29CP451MR67Q0Q1Q2Q3Q4Q5111013122571012151415VCC = Pin 16GND = Pin 8SF001SF00190October 7, 19882853–0060 94766元器件交易网www.cecb2b.comPhilips Semiconductors Product specificationHex D flip-flop74F174LOGIC DIAGRAMD0D1D2D3D4D5346111314DQDQDQDQDQDQCPCPCPCPCPCPRDRDRDRDRDRDCP9MR1257101215VCC = Pin 16Q0Q1Q2Q3Q4Q5GND = Pin 8SF00192FUNCTION TABLEINPUTSOUTPUTSMRCPDQnOPERATINGOPERATING MODEMODELXXLReset (clear)H↑hHLoad “1”H↑lLLoad “0”H = High voltage levelL = Low voltage levelX = Don’t care↑ = Low-to-High Clock transitionh = High voltage level one set-up time prior to the Low-to-High Clock transition.l = Low voltage level one set-up time prior to the Low-to-High Clock transition.ABSOLUTE MAXIMUM RATINGS(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.)SYMBOLPARAMETERRATINGUNITVCCSupply voltage–0.5 to +7.0VVINInput voltage –0.5 to +7.0VIINInput current–30 to +5mAVOUTVoltage applied to output in High output state–0.5 to VCCVIOUTCurrent applied to output in Low output state40mATambOperating free-air temperature range0 to +70°CTstgStorage temperature range–65 to +150°CRECOMMENDED OPERATING CONDITIONSSYMBOLPARAMETERLIMITSMINNOMMAXUNITVCCSupply voltage4.55.05.5VVIHHigh-level input voltage2.0VVILLow-level input voltage0.8VIIKInput clamp current–18mAIOHHigh-level output current–1mAIOLLow-level output current20mATambOperating free-air temperature range0 +70°COctober 7, 19883元器件交易网www.cecb2b.comPhilips Semiconductors Product specificationHex D flip-flop74F174DC ELECTRICAL CHARACTERISTICS(Over recommended operating free-air temperature range unless otherwise noted.)SYMBOLPARAMETERTEST CONDITIONSTESTCONDITIONS1LIMITSMINTYP2MAXUNITVVCC = MIN, VIL = MAX±10%VCC2.5OHOHighHigh-level output voltageleveloutputvoltageVVIH = MIN, IOH = MAX±5%VCC2.73.4VVCC = MIN, VIL = MAX±10%VCC0.300.50OLOLowLow-level output voltageleveloutputvoltageVVIH = MIN, IOL = MAX±5%VCC0.300.50VIKInput clamp voltageVCC = MIN, II = IIK–0.73–1.2VIIInput current at maximum input voltageVCC = MAX, VI = 7.0V100µAIIHHigh-level input currentVCC = MAX, VI = 2.7V20µAIILLow-level input currentVCC = MAX, VI = 0.5V–0.6mAIOSShort-circuit output current3VCC = MAX–60–150mAICCSupply current (total)VCC = MAX, Dn = MR = 4.5V, CP = ↑35mANOTES:1.For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.2.All typical values are at VNot more than one output should be shorted at a time. For testing ICC = 5V, Tamb = 25°C.3.OS, the use of high-speed test apparatus and/or sample-and-holdtechniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shortingof a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In anysequence of parameter tests, IOS tests should be performed last.AC ELECTRICAL CHARACTERISTICSLIMITSV = +5.0VVSYMBOLPARAMETERTESTTCCCC = +5.0V ± 10%CONDITIONamb = +25°CTCamb = 0°C to +70°CUNITL = 50pF, RL = 500ΩCL = 50pF, RL = 500ΩMINTYPMAXMINMAXfMAXMaximum clock frequencyWaveform 18010080MHztPropagation delay3.59.0tPLHPHLCP to QnWaveform 13.55.58.04.56.010.04.511.0nstPHLPropagation delay MR to QnWaveform 25.08.514.05.015.0nsAC SETUP REQUIREMENTSLIMITSVSYMBOLPARAMETERTESTVCC = +5.0V ± 10%CONDITIONTCC = +5.0Vamb = +25°CTCamb = 0°C to +70°CUNITL = 50pF, RL = 500ΩCL = 50pF, RL = 500ΩMINTYPMAXMINMAXtSetup time, High or Low4.0tS(H)S(L)Dn to CPWaveform 34.04.04.0nsth(H)Hold time, High or Low0.0th(L)Dn to CPWaveform 30.00.00.0nstw(H)CP Pulse width,4.04.0tw(L)High or LowWaveform 16.06.0nstw(L)MR Pulse width, LowWaveform 25.05.0nstRECRecovery time, MR to CPWaveform 25.05.0nsOctober 7, 19884元器件交易网www.cecb2b.comPhilips Semiconductors Product specificationHex D flip-flop74F174AC WAVEFORMSFor all waveforms, VM = 1.5V.The shaded areas indicate when the input is permitted to change for predictable output performance.1/fMAXtw(L)DnVMVMVMVMCPVMVMtw(H)ts(H)th(H)ts(L)th(L)tPHLtPLHCPVMVMQnVMVMSF00191SF00166Waveform 3.Data Setup and Hold TimesWaveform 1.Propagation Delay, Clock Input to Output,Clock Pulse Width, and Maximum Clock FrequencyMRVMVMtw(L)tRECCPVMtPHLQnVMSF00158Waveform 2.Master Reset Pulse Width, Master Reset toOutput Delay and Master Reset to Clock recovery TimeTEST CIRCUIT AND WAVEFORMSVCC90%tw90%AMP (V)NEGATIVEPULSEVMVMVINVOUT10%10%0VPULSEGENERATORD.U.T.tTHL (tf )tTLH (tr )RTCLRLtTLH (tr )tTHL (tf )90%90%AMP (V)POSITIVEPULSEVMVMTest Circuit for Totem-Pole Outputs10%t10%w0VDEFINITIONS:RInput Pulse DefinitionL=Load resistor; see AC ELECTRICAL CHARACTERISTICS for value.CL=Load capacitance includes jig and probe capacitance; familyINPUT PULSE REQUIREMENTSsee AC ELECTRICAL CHARACTERISTICS for value.amplitudeVMrep. ratetwtTLHtTHLRT=Termination resistance should be equal to ZOUT of pulse generators.74F3.0V1.5V1MHz500ns2.5ns2.5nsSF00006October 7, 19885元器件交易网www.cecb2b.com
Philips Semiconductors
Product specification
Hex D flip-flops74F174
DIP16:plastic dual in-line package; 16 leads (300 mil)SOT38-4
1988 Oct 076
元器件交易网www.cecb2b.com
Philips Semiconductors
Product specification
Hex D flip-flops74F174
SO16:plastic small outline package; 16 leads; body width 3.9 mmSOT109-1
1988 Oct 077
元器件交易网www.cecb2b.com
Philips Semiconductors
Product specification
Hex D flip-flops74F174
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. Fordetailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above oneor more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these orat any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extendedperiods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. PhilipsSemiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing ormodification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products canreasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applicationsdo so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standardcells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes noresponsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to theseproducts, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unlessotherwise specified.
Philips Semiconductors811 East Arques AvenueP.O. Box 3409
Sunnyvale, California 94088–3409Telephone 800-234-7381
© Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
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Document order number:Date of release: 10-98
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