TTL output driver gate configuration

专利名称：TTL output driver gate configuration发明人：Nix, Michael A.申请号：EP305653.1申请日：190605公开号：EP0347083A2公开日：191220

摘要：A TTl output driver gate configuration which has reduced voltage spikes oninternal power supply potential and ground potential nodes includes a P-channel pull-uptransistor (P1), an N-channel pull-down transistor (N1), a NAND logic gate (14), a NORlogic gate (16), a first positive feedback amplifier circuit (18), and a second positivefeedback amplifier circuit (20). The pull-up transistor (P1) and the pull-down transistor(N1) have gates which are made serpentine. The reduction of voltage spikes is achievedby slowing down the turn-on times of the pull-up and pull-down transistors duringtransitions due to the distributed resistances and capacitances of the polysilicon materialused to form the serpentine gates thereof. The first and second positive feedbackamplifier circuits (18, 20) are used to pull the undriven gate ends of the respectivetransistors all the way to negative and positive supply potentials so as to facilitatetransitions at an output node.

申请人：ADVANCED MICRO DEVICES, INC.

地址：901 Thompson Place P.O. Box 3453 Sunnyvale, CA 94088 US

国籍：US

代理机构：Sanders, Peter Colin Christopher

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