DC-OFFSET CORRECTION CIRCUIT HAVING A DC CONTROL L

专利名称：DC-OFFSET CORRECTION CIRCUIT HAVING

A DC CONTROL LOOP AND A DC BLOCKINGCIRCUIT

发明人：VAN BEZOOIJEN, Adrianus,ARENDS, Marc,

V.,DE GROOT, Hermana, W., H.

申请号：EP019977.2申请日：20011115公开号：EP1260027B1公开日：20041215

摘要：A DC-offset correction circuit (I1, Q1) for a low-IF or zero-IF receiver, comprisesa DC-offset control loop (O1, O2) embodied by: a summing device (9-1, 9-2) having asignal path input (10-1, 10-2), a DC control input (11-1, 11-2), and a summing output (12-1,12-2); and an offset determining means (15-1, 15-2) coupled between the summingoutput (12-1, 12-2) and the DC control input of the summing device (9-1, 9-2). The DC-offset correction circuit (I1, Q1) further comprises a DC blocking circuit (17-1, 17-2)coupled to the summing output (12-1, 12-2) of the summing device (9-1, 9-2) and having aDC blocking output (18-1, 18-2) for providing an offset corrected output signal. The DC-offset control loop (O1, O2) and the DC blocking circuit (17-1, 17-2) advantageouslyinteract in correcting DC offset.

申请人：KONINKL PHILIPS ELECTRONICS NV

地址：NL

国籍：NL

代理机构：Duijvestijn, Adrianus Johannes

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